1. Technical Field
Various embodiments relate to a semiconductor integrated apparatus, and more particularly, to a word line driver circuit and a resistance variable memory apparatus having the same.
2. Related Art
A semiconductor memory cell may be realized in various types. For example, a selection device and a data storage unit which is coupled in series with the selection device may be realized as a unit memory cell. A memory cell array may be configured by forming unit memory cells at respective intersection regions between a plurality of bit lines and a plurality of word lines.
If the size of a word line driver is small and the number of selection devices to drive is large, a time constant (tau=R*C) increases correspondingly. Therefore, a time that is required to turn on all selection devices electrically coupled to a selected word line and form current paths to memory cells cannot help but be lengthened.
A read or write operation in a semiconductor memory apparatus may be performed without an error when it is performed after current paths to memory cells are formed. Thus, a time that is required to turn on all selection devices coupled to a selected word line is directly associated with time-related characteristics and economic effects of a product.